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FPGA Learning Notes (I) FPGA Minimum System

2024-07-12

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Preface

     今天学习下FPGA的最小系统
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1. FPGA Minimum System

The FPGA minimum system is similar to the STM32 minimum system.Power supplyClock circuit crystalResetandDebug interface JTAGas well asFLASH configuration chipThe biggest difference between it and STM32 is that it must have an external flash configuration chip for saving the program during power-off. Correspondingly, there are many types of configuration chips, so there are dedicated configuration mode pins on the FPGA.

Secondly, compared with the single power supply of the microcontroller, most FPGAs require at least three power rails for the power supply of each Bank IO.VCCOAuxiliary power supply VCCAUX ,andCore power supply VCCINT

Clock module, the microcontroller uses fixed pins, and is generally a passive crystal oscillator.FPGA is an active crystal oscillator, and only needs to be connected to a global clock pin
The last difference is the reset circuit. Since FPGA is composed of pure hardware resources, there is no dedicated reset pin.But sometimes, for the convenience of debugging, a custom reset button is set up, which can be connected to any IO, and of course it is best to connect it to the global clock pin.
The JTAG function of FPGA is the same as that of STM32, which is used for online debugging and program solidification. However, there is a big difference in the usage of online debugging function. Since STM32 is executed sequentially, more debugging is done through breakpoint observation, while FPGA is composed of hardware logic.Online debugging is more like a logic analyzer, setting trigger conditions to view timing relationshipsOf course, high-end FPGAs have other functions, but their smallest systems cannot do without these.
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Summarize

refer to:FPGA Minimum System