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Because the pins used by the teacherClassificationI didn't find the microcontroller schematic diagram, I used the pinIn orderIt is not convenient to display the screenshots one by one, so this part uses the teacher's schematic diagram.

1. Power supply

1.1 Introduction to power supply

1.1.1 Digital Power and Ground (VDD and VSS)

Digital PowerThe pin provides voltage to all digital circuit parts. These digital circuits include:

• Processor core: Execute instructions and process data.
• Memory: Includes Flash and SRAM for storing programs and data.
• Digital Peripherals: Including GPIO, UART, SPI, I2C, TIMERS, etc., for various digital communications and controls.
• Internal Oscillator: Generates clock signals to drive processors and other peripherals.

DigitallyThe pin provides the ground reference point for all digital circuit parts, including:

• All current supplied by VDD will eventually return to VSS to form a complete current loop.
• In PCB design, all VSS pins are usually connected to a common ground plane to reduce electrical noise and interference.

1.1.2 Analog Power and Ground (VDDA and VSSA)

Analog Power SupplyThe pin provides voltage to all analog circuit parts. Mainly includes:

• ADC (Analog-to-Digital Converter): Convert analog signals to digital signals.
• DAC (Digital to Analog Converter): Convert digital signals to analog signals.
• Internal reference voltage source: Provide a stable reference voltage to ADC and DAC to ensure conversion accuracy.

Analog GroundThe pin provides the ground reference point for all analog circuit parts, including:

• Like VSS, all current supplied through VDDA eventually returns to VSSA to form a complete current loop.

1.1.3 Differences and connections between the two power supplies

Digital circuits usually generate high-frequency switching noise, which can directly interfere with analog circuits and cause instability and reduced accuracy of analog signals. Therefore, using independent analog power and ground can reduce this interference.

Analog circuits require a very clean, stable power supply to ensure accurate signal processing, so VDDA is usually decoupled through additional filtering circuits.

In order to reduce the interference of high-frequency noise generated by digital circuits on analog circuits, VSSA and VSS are usually treated separately in PCB design and connected only at a single point, usually near the power entry.

1.2 Filtering Introduction

Introduce 3.3V power supply for the microcontroller.

(1) 120R magnetic beads

• effect: A magnetic bead is a high-frequency impedance component connected in series on the power line.Prevent high frequency noise from propagating along the power line.
• principle: Ferrite beads present low impedance at DC and low-frequency AC signals, but high impedance at high frequencies, thereby filtering out high-frequency noise.
• choose: 120Ω ferrite beads are usually used for noise suppression in the mid-frequency range. It provides enough impedance to attenuate noise in the high-frequency range.

(2) 10µF capacitor

• effect: 10µF capacitor is used for low frequency filtering,Smooth DC voltage, eliminating lower frequency power supply fluctuations.
• principle: Larger capacitor values ​​have lower impedance at low frequencies, which can effectively smooth the DC voltage and filter out low-frequency noise.
• Location: A 10µF capacitor is usually placed at the power input to smooth the voltage of the entire power network.

(3) 0.1µF capacitor

• effect: 0.1µF capacitor is used for high frequency filtering,Suppress high frequency noise and spike interference.
• principle: Smaller capacitance values ​​have smaller impedance at high frequencies and can effectively filter out high-frequency noise and spike interference.
• Location: A 0.1µF capacitor is typically placed near each VDD/VDDA pin, as close to the IC as possible, to provide the most effective high frequency noise filtering.

(4) 10nF capacitor

• Supplementary filter bands: When used in combination with other filter capacitors (10µF, 0.1µF), it can cover a wider frequency range and provide full-band power supply noise suppression for the analog power supply (as mentioned above, the analog power supply needs to be very pure).

1.3 Circuit Diagram

1.4 Chen’s understanding (maybe only I can understand it)

Digital signals (digital power supply), such as the differential signal on the signal line, 1 is 1, 0 is 0, the difference is quite large, and it is not easy to confuse, but it changes quickly and there is interference with other forms of signals (here refers to analog signals), so digital signals and analog signals are distinguished.

Secondly, analog signals are not like digital signals where 1 is 1 and 0 is 0. Their values ​​will be converted into corresponding binary numbers, so they must be more accurate and the filtering is more stringent.

2. Reset

2.1 Working process

1. Normal working status: When the reset button is not pressed, the pull-up resistor maintains the RST pin at a high level. At this time, the microcontroller is in normal working state.
2. Press the reset button: When the reset button is pressed, the RST pin is pulled low directly to ground. This triggers the reset process of the microcontroller.
3. Release the reset button: When the reset button is released, the RST pin returns to a high level through the pull-up resistor. A decoupling capacitor is needed to help filter out any transient noise during the recovery process (there is also decoupling during the pressing process) to ensure that the RST pin returns to a high level stably, so that the microcontroller can start normally from the reset state.

2.2 Special Cases

• External interference: In an environment with strong electromagnetic interference, the reset pin may be interfered with, resulting in false reset. Appropriate filtering circuits (such as larger capacitors or lower pull-up resistors) can further enhance the anti-interference capability.
• Reset time: The value of the decoupling capacitor determines the time constant of the reset signal. A larger capacitor will result in a longer reset time, but can better filter out low-frequency noise. The choice needs to be made based on the actual application.

2.3 I have a stupid question

Q: Why is the pull-up power supply the digital power supply VDD instead of the analog power supply VDDA?

answer:

1. Power stability

VDD Stability: VDD is a digital power supply, usually powered directly by a voltage regulator. The voltage is relatively stable and can quickly reach a stable value when powered on. The reset circuit requires a stable voltage source to ensure the reliability of the reset signal.

VDDA depends on VDD: VDDA is the analog power supply. Although it is also very stable, it usually relies on the power supply of VDD. In some designs, VDDA may be filtered and adjusted to meet the needs of analog circuits. The startup speed and stability may be slightly slower than VDD.

2. Effect of reset circuit on digital circuit

The reset circuit is mainly for digital circuits: The reset signal is mainly used to reset the digital circuits inside the STM32 (including the CPU and peripherals). The operating voltage of the digital circuit is VDD, so it is more appropriate to pull the reset pin up to VDD.

3. Power supply current load considerations

Strong VDD current capability: The current supply capability of the VDD power supply is usually greater than that of VDDA because it supplies power to the entire digital section, including the processor, memory, and peripherals, etc. The current load of the pull-up resistor has little effect on VDD.

High VDDA load requirements: The VDDA power supply is mainly used to supply power to analog circuits (such as ADC, DAC, etc.), which have higher requirements on power supply ripple and noise. Connecting a pull-up resistor to VDDA may introduce unnecessary load and noise, affecting the performance of analog circuits.

2.4 Circuit Diagram

3. BOOT

3.1 Introduction

The BOOT pins (BOOT0 and BOOT1) are used to select the boot mode of the microcontroller. Different boot modes can be selected by different pin level combinations, as shown in the following figure:

3.2 Circuit

Lead out the BOOT0 and BOOT1 pins of the microcontroller through 2×3 male pin headers.Jumper capSelect VDD_MCU (1) upward and GND (0) downward to configure the startup mode of the MCU. The startup mode selected by the teacher is: Start from built-in SRAM, as shown below.

4. Crystal Circuit

4.1 Why does STM32 need two crystal oscillator circuits?

STM32 microcontrollers usually use two crystal oscillator circuits to meet different clock requirements:

• Main crystal oscillator circuit (8MHz): Used to provide the main system clock (HSE, High-Speed ​​External Clock). This clock source is usually used for the core processing unit of the microcontroller, high-speed peripherals (such as USB, CAN, etc.), and functions that require high-precision, high-speed clocks.
• Sub-crystal oscillator circuit (32.768kHz): Used to provide a low-speed external clock (LSE). This clock source is usually used for real-time clock (RTC) and timing functions in low-power mode. The frequency of 32.768kHz is just right for timing because it can be easily used to generate a clock cycle of 1 second (32,768 is 2 to the 15th power, which is suitable for binary counting).

4.2 Why are the frequencies of these two crystal oscillator circuits like that?

The reasons for choosing crystal oscillators of different frequencies and specifications are as follows:

• 8MHz crystal oscillator (main crystal oscillator):

  • Frequency selection: 8MHz is a commonly used high frequency that can meet the clock requirements of the STM32 core and high-speed peripherals.
  • Load capacitance (22pF): Ensure the stability and reliability of the crystal at this frequency. 22pF is a common load capacitor value used to match the load requirements of the crystal.

• 32.768kHz crystal oscillator (sub-crystal oscillator):

  • Frequency selection: 32.768kHz is a standard RTC crystal frequency and is suitable for low-power clock applications.
  • Load capacitance (10pF): This low value capacitor is suitable for low frequency crystal oscillators to ensure stable oscillation at low frequencies.

4.3 How does a crystal oscillator circuit work? (It is easier to understand questions 4.4 and 4.5)

(1) Crystal oscillator starting

• When the power is turned on, the crystal oscillator starts to generate a weak oscillation signal.
• This signal enters the STM32 internal oscillator circuit through the OSC_IN pin.

(2) Load capacitance adjustment

• The C1 and C2 capacitors work with the crystal to ensure that the crystal oscillates at its nominal frequency.
• The load capacitance value is usually selected in the range of 10pF to 22pF, but the actual value should be adjusted according to the crystal specification and the parasitic capacitance of the circuit board.

(3) Signal amplification

• The oscillator circuit inside the STM32 amplifies the input weak oscillation signal to generate a stable clock signal.
• This stable clock signal is output through the OSC_OUT pin and used as the system clock for the STM32.

(4) Signal feedback

• The oscillator circuit feeds the amplified oscillation signal back to the crystal oscillator circuit through the OSC_OUT pin to continue to maintain the oscillation of the crystal oscillator.
• This feedback loop ensures that the crystal oscillator can continue to generate a stable oscillation signal.

(Now you know clearly that there is a loop in the crystal oscillator circuit.)

4.4 Why does the main crystal oscillator circuit OSC have a large resistor? What is its purpose?

The main crystal oscillator circuit contains a 1MΩ large resistor (usually connected between OSC_IN and OSC_OUT), whose main functions are as follows:

• Preventing difficult starting: The large resistor provides an initial feedback path, which helps the crystal oscillator start quickly at power-on and avoids startup difficulties caused by unstable initial state.
• Stable oscillation: The large resistor can stabilize the startup process of the oscillator and ensure that the oscillator can quickly enter a stable state after startup.

(To put it simply, it means to form the current loop mentioned in 4.3 as quickly as possible.)

4.5 Why does the sub-crystal oscillator circuit OSC32 not have a large resistor?

The reasons why a large resistor is usually not required in a sub-crystal oscillator circuit include:

• Low frequency and power: The 32.768kHz crystal operates at very low frequency and power, and is relatively easy to start, without the need for additional resistors to aid startup.
• Low power design: Sub-crystal oscillator circuits are often used in RTC and low-power applications. Adding large resistors will increase power consumption and does not meet the requirements of low-power design.

4.6 Circuit Diagram

5. RTC Real-time Clock

5.1 Function of VBAT pin

The VBAT pin is used to power the RTC and backup registers so that the RTC continues to operate when the main power is removed.

5.2 Design Principles

1. Main power supply (VDD_MCU): When the main power supply (VDD_MCU) is supplied, the BAT54-C diode is forward biased, the VBAT pin obtains the voltage of VDD_MCU through the diode, and the RTC and backup registers work normally.
2. Backup power supply: When the main power is disconnected, the BAT54-C diode prevents reverse current flow, and the RTC and backup registers can continue to be powered from a backup power source (such as a button battery) through the ZH1.25-2A connector, ensuring that the RTC time and backup data are not lost.

5.3 Schematic diagram

5.3.1 Function of BAT54-C diode

1. Ensure power supply: When the main power is present, the diode is forward biased, ensuring that the VBAT pin obtains a stable voltage supply; when the main power is disconnected, the diode is reverse biased, and the backup power supply immediately takes over the power supply to ensure that the RTC continues to operate.
2. Preventing reverse current: Ensure that when the main power is disconnected, the backup power current will not flow back to the main power circuit to avoid unnecessary power consumption and possible circuit damage. At the same time, it also ensures that when the main power is normally supplied, the chip current will not flow back to the backup battery and cause damage.

5.3.2 Function of ZH1.25-2A connector

1. Backup power interface: An interface for connecting a backup power source is provided to facilitate connection and replacement of batteries or other backup power sources.
2. Ensure the power supply path: Through the ZH1.25-2A connector, the backup power supply can reliably provide voltage to the VBAT pin to ensure that the power supply to the RTC is not interrupted.

6. Flash chip

6.1 Chip Function

In STM32 microcontrollers, external Flash memory (such as W25Q64JVSSIQ used in this project) is often used to store firmware, data logs, or other applications that require non-volatile storage.

6.1 Pin Introduction and Circuit Design Concept

1. CS# (Chip Select):

• design: The CS# pin is controlled by the PA15 pin. A low level activates the chip, and a high level shuts down the chip.
• principle: When CS# is low, the Flash chip is selected and the STM32 can communicate with it; when CS# is high, the Flash chip is inactive. Since multiple SPI devices can share the same SPI bus, other devices can communicate at this time.

2. SO (Serial Output):

• design: The SO pin is connected to the STM32 through the PB4 pin (MISO, Master In Slave Out).
• principle: Used to send data from the Flash chip to the STM32 in SPI communication.

3. WP# (Write Protect):

• design: The WP# pin is connected directly to the 3.3V power supply.
• principle: Connecting WP# high (3.3V) disables the write protection function and enables write operations.

4. GND (Ground):

• design: The GND pin is connected to ground.
• principle: Provides a power supply circuit for the chip.

5. SI (Serial Input):

• design: The SI pin is connected to the STM32 via the PB5 pin (MOSI, Master Out Slave In).
• principle: Used to send data from STM32 to Flash chip in SPI communication.

6. CLK (Clock):

• design: The CLK pin is connected to the STM32 via the PB3 pin.
• principle: Provides the clock signal for SPI communication, generated and controlled by STM32.

7. HOLD3#:

• design: The HOLD3# pin is connected to a 3.3V power supply.
• principle: Connecting HOLD3# to a high level (3.3V) disables the suspend function and allows the Flash chip to operate normally.

8. VCC (Power Supply):

• design: The VCC pin is connected to a 3.3V power supply.
• principle: Provides operating voltage for the Flash chip.

9. Power filter circuit

• design: The 3.3V power supply is connected to ground via a 0.1uF capacitor.
• principle: Decoupling capacitors are used to filter out high-frequency noise on the power line, stabilize the power supply, and ensure the normal operation of the Flash chip.

6.2 Circuit Operation

1. Power-on: The 3.3V power supply provides power for the Flash chip, and the capacitor filters out power supply noise.
2. SPI Communication: STM32 communicates with the Flash chip via the SPI interface (PA15, PB3, PB4, PB5 pins):
   • PA15 controls CS# and selects the chip.
   • PB3 provides the clock signal (CLK).
   • PB5 sends data to the Flash chip (MOSI).
   • PB4 receives data from the Flash chip (MISO).
3. Write protection: WP# (IO2 in the figure below) is connected to a high level to ensure that the write operation is not disabled, facilitating data writing.
4. Pause function: HOLD3# (IO3 in the figure below) is connected to a high level to disable the suspend function and ensure normal operation.

6.3 Other Design Methods

1. Hardware Write Protection: If hardware write protection function is required, the WP# pin can be connected to a GPIO pin of the STM32 and the write protection state can be controlled by software.
2. Use a larger capacitor: In the power supply filter circuit, a larger capacitor (such as 1uF or 10uF) can be used according to the actual situation to further smooth the power supply voltage.
3. Adding buffer circuit: In a noisy environment, you can add a buffer circuit to the SPI signal line to improve communication reliability. (Specific methods: use buffer chips, series resistors, capacitor filtering, and shielded cables.)

7. SWD Debug Interface

SWD (Serial Wire Debug) is a debugging and programming interface widely used in ARM Cortex-M series microcontrollers. It uses two data lines (SWDIO and SWCLK) to achieve efficient debugging and programming. Its functions are as follows:

• Debugging and Programming: The SWD interface is a standard interface for debugging and programming microcontrollers. It can be used to download firmware, debug, set breakpoints, view variables, etc.
• Simplified connections: Through standardized pins and interfaces, a debugger can be easily connected to simplify the debugging and programming process.
• Reliable communication: Pull-up and pull-down resistors are used to ensure that the signal line is at a stable level in the idle state to avoid noise interference.

In this project, this part of the circuit consists of three parts:

1. HDR-M-2.54 1x5
   
2. XYXH2.54-5A11
   
3. 2.54mm 2x10 straight
   

All three parts provide SWD interfaces, but the forms and connection methods are slightly different.

7.1 HDR-M-2.54 1x5

7.1.1 Circuit diagram

7.1.2 Function and principle

• VCC and GND: Provide power and ground wires to ensure that the debugger and STM32 have a common power reference.
• NRST : Used to externally reset the STM32. The debugger can control the NRST pinReset STM32 。
• SWDIO（Serial Wire Debug Input/Output）: Bidirectional data line used to transfer debugging and programming data.
• SWCLK（Serial Wire Clock）: Clock signal, generated by the debugger, provides a timing reference for SWD communications.

7.2 XYXH2.54-5A11

7.2.1 Circuit diagram

7.2.2 Function and principle

This part has the same functionality as the HDR-M-2.54 1x5, but the pinout and connections are different.

7.3 Pull-up and pull-down resistors

As for why the former has pull-up and pull-down resistors, while the latter does not, the explanation is as follows:

(1) Considerations for selecting pull-up and pull-down resistors

1. Environmental noise: If the system operates in a high-noise environment, it is recommended to add pull-up and pull-down resistors.
2. Pin stability: You need to ensure that the pins remain stable when the debugger is not connected or enabled.
3. Debugger features: Some debuggers have integrated pull-up and pull-down resistors, so external resistors can be omitted.

(2) Why does the HDR-M-2.54 1x5 have pull-up and pull-down resistors?

• applicability: Pull-up and pull-down resistors are incorporated into the HDR-M-2.54 1x5 design to ensure that the pins are in a stable state when the debugger is not connected or enabled.
• Improved reliability: Pull-up and pull-down resistors can be used to avoid malfunctions caused by noise when the debugger is not connected or not driven, thereby improving system reliability.

      Specific connections

• SWDIO (pull-up): A 10kΩ resistor is used to pull the SWDIO pin up to 3.3V to ensure that the SWDIO pin remains high when the debugger is not connected.
• SWCLK (pull-down): A 10kΩ resistor is used to pull the SWCLK pin down to ground to ensure that the SWCLK pin remains at a low level when the debugger is not connected to avoid a floating state.

(3) Why does XYXH2.54-5A11 not have pull-up and pull-down resistors?

• Design simplification: XYXH2.54-5A11 omits the pull-up and pull-down resistors for design simplification, allowing for more flexibility in using different debuggers.
• Dependence on external circuit: In some designs, it may beRelying on pull-up and pull-down resistors on the debugger or development board,Rather than directly configuring in the interface circuit.
• Different environments: In some application environments, it may be considered that external interference is small and the demand for pull-up and pull-down resistors is not strong, so they are omitted.

7.4 2.54mm 2x10 straight

Here we have to mention that there are two debugging modes.：JTAG mode and SWD mode, the former has more interfaces and is more suitable for complex hardware design, while the latter has fewer signal lines and is suitable for limited embedded systems. JTAG interface (for convenience of subsequent improvements) but only uses SWD mode.

7.4.1 Circuit diagram

7.4.2 Function and principle

Same as above.

7.4.3 Extension

This part provides a standard JTAG interface format, but only uses the pins required for SWD.The remaining unused pins are marked as no connect or crossed out.

(1) Forked pins

1. TRST (Pin 3):

   • Function: JTAG reset signal, used to reset the JTAG debugging logic.
   • Why fork: In SWD mode, the TRST pin is not used because SWD mode does not require a separate JTAG reset signal.

2. TDI (Pin 5):

   • Function: JTAG test data input, used to input test data.
   • Why fork: In SWD mode, the TDI pin is not used because SWD mode does not require a separate data input pin.

3. TDO/SWO (Pin 13):

   • Function:
     • TDO（Test Data Out）: JTAG test data output, used to output test data.
     • SWO（Serial Wire Output）： In SWD mode, it is used as serial output for debugging information output.
   • Why fork: In some simplified designs, the SWO pin is not used or connected.

4. NC (Pins 9, 11, 15, 17):

   • Function: Not Connected, no specific function is assigned.
   • Why fork: These pins are not used in this particular design.

(2) Explanation of multiplexed pins

The multiplexed pins (TMS/SWDIO, TCK/SWCLK) have dual functions and support both JTAG and SWD debugging protocols. The specific functions are as follows:

1. TMS/SWDIO (pin 7):

   • TMS（Test Mode Select）： In JTAG mode, used to select the test mode.
   • SWDIO（Serial Wire Debug Input/Output）： In SWD mode, it acts as a bidirectional data line to transmit debugging and programming data.

2. TCK/SWCLK (Pin 9):

   • TCK（Test Clock）： In JTAG mode, it is used to provide the test clock signal.
   • SWCLK（Serial Wire Clock）： In SWD mode, it is used to provide the serial clock signal.

(3) Use of multiplexing functions

In actual use, the debugger and microcontroller will select the appropriate debugging protocol and pin function according to the configuration. For example:

• When SWD mode is selected, the TMS/SWDIO pin is configured as SWDIO and the TCK/SWCLK pin is configured as SWCLK.
• When JTAG mode is selected, the TMS/SWDIO pin is configured as TMS, the TCK/SWCLK pin is configured as TCK, and the TDI and TDO pins may be used.

(4) Other hardware design solutions

In addition to the above design options, there are other designs that can be considered:

1. SWD interface only: If only SWD debugging function is needed, only SWDIO and SWCLK pins can be reserved, eliminating unnecessary JTAG pins.
2. Versatile Interface: Design a multi-function debugging interface that can support both JTAG and SWD and switch between them as needed.
3. Onboard debugger: Design an onboard debugger, such as ST-LINK, directly integrated into the development board to provide a more convenient debugging and programming interface.

(5) Other debugging modes

In addition to SWD and JTAG modes, there are several other debugging and programming modes:ISP、UART、I2C、SPIwait.

8. STM32

The highlight is coming, and I’m a little nervous.